1. Field of the Invention
Embodiments of the present invention relate to an apparatus, medium, and method for processing neighbor information in video decoding, and more particularly, to an apparatus, medium, and method for processing neighbor information in a video decoder that minimizes the number of memory accesses.
2. Description of the Related Art
Video decoders decompress images that are encoded in a compressed form. The video decoders are included in such devices as a video codec or an H.264 codec. FIG. 1 illustrates a block diagram of an H.264 decoder included in an H.264 codec.
The H.264 decoder shown in FIG. 1 uses an entropy-decoder 102, a dequantization and inverse transformation unit 103, a motion prediction unit 104, and a deblocking filter 105, in a pipeline form in order to improve its speed. Here, when the entropy-decoder 102 entropy-decodes an nth macroblock, the dequantization and inverse transformation unit 103 dequantizes and inversely transforms an (n−1)th macroblock, the motion prediction unit 104 performs motion prediction on an (n−2)th macroblock, and the deblocking filter 105 performs deblocking-filtering on an (n−3)th macroblock.
These modules, and others such as a parser 101, are supposed to access a memory 107 using a common bus 106. The memory 107 typically store information in macroblock or block units. Thus, the entropy-decoder 102, the dequantization and inverse transformation unit 103, and the motion prediction unit 104, and the deblocking filter 105 access the memory 107 through the common bus 106 when information of spatially neighboring macroblocks or blocks is required.
However, since the modules operate in the form of a macroblock-based pipeline, as described above, several of the modules can access the memory 107 at the same time. Consequently, collisions occur in the common bus 106, resulting in delays in data transmission. Also, such operations by each module has it's own latency, as shown in FIG. 2, from generating an address to access the memory 107 to receiving actual data. The latency ranges from 8 to 9 clock cycles. Such problems inevitably limit improvements in the processing speed of the H.264 decoder.
Also, the bit size of most of the neighbor information that is accessed in the memory 107 is smaller than that of the common bus 106. Thus, as the number of accesses of the memory 107 to obtain the neighbor information increases, the common bus 106 operates less efficiently.